License: Creative Commons Attribution 3.0 Unported license (CC BY 3.0)
When quoting this document, please refer to the following
DOI: 10.4230/LIPIcs.ECRTS.2019.7
URN: urn:nbn:de:0030-drops-107448
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2019/10744/
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Rivas, Juan M. ; Goossens, Joël ; Poczekajlo, Xavier ; Paolillo, Antonio

Implementation of Memory Centric Scheduling for COTS Multi-Core Real-Time Systems

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LIPIcs-ECRTS-2019-7.pdf (0.9 MB)


Abstract

The demands for high performance computing with a low cost and low power consumption are driving a transition towards multi-core processors in many consumer and industrial applications. However, the adoption of multi-core processors in the domain of real-time systems faces a series of challenges that has been the focus of great research intensity during the last decade. These challenges arise in great part from the non real-time nature of the hardware arbiters that schedule the access to shared resources, such as the main memory. One solution proposed in the literature is called Memory Centric Scheduling, which defines a separate software scheduler for the sections of the tasks that will access the main memory, hence circumventing the low level unpredictable hardware arbiters. Several Memory Centric schedulers and associated theoretical analyses have been proposed, but as far as we know, no actual implementation of the required OS-level underpinnings to support dynamic event-driven Memory Centric Scheduling has been presented before. In this paper we aim to fill this gap, targeting cache based COTS multi-core systems. We will confirm via measurements the main theoretical benefits of Memory Centric Scheduling (e.g. task isolation). Furthermore, we will describe an effective schedulability analysis using concepts from distributed systems.

BibTeX - Entry

@InProceedings{rivas_et_al:LIPIcs:2019:10744,
  author =	{Juan M. Rivas and Jo{\"e}l Goossens and Xavier Poczekajlo and Antonio Paolillo},
  title =	{{Implementation of Memory Centric Scheduling for COTS Multi-Core Real-Time Systems}},
  booktitle =	{31st Euromicro Conference on Real-Time Systems (ECRTS 2019)},
  pages =	{7:1--7:23},
  series =	{Leibniz International Proceedings in Informatics (LIPIcs)},
  ISBN =	{978-3-95977-110-8},
  ISSN =	{1868-8969},
  year =	{2019},
  volume =	{133},
  editor =	{Sophie Quinton},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2019/10744},
  URN =		{urn:nbn:de:0030-drops-107448},
  doi =		{10.4230/LIPIcs.ECRTS.2019.7},
  annote =	{Keywords: real-time, multi-core, memory centric, predictability, implementation, rtos}
}

Keywords: real-time, multi-core, memory centric, predictability, implementation, rtos
Collection: 31st Euromicro Conference on Real-Time Systems (ECRTS 2019)
Issue Date: 2019
Date of publication: 02.07.2019


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