License: 
Creative Commons Attribution 4.0 International license (CC BY 4.0)
When quoting this document, please refer to the following
DOI: 10.4230/OASIcs.PARMA-DITAM.2023.7
URN: urn:nbn:de:0030-drops-177278
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2023/17727/
Katsaragakis, Manolis ;
Stavrakakis, Konstantinos ;
Masouros, Dimosthenis ;
Papadopoulos, Lazaros ;
Soudris, Dimitrios
Adjacent LSTM-Based Page Scheduling for Hybrid DRAM/NVM Memory Systems
Abstract
Recent advances in memory technologies have led to the rapid growth of hybrid systems that combine traditional DRAM and Non Volatile Memory (NVM) technologies, as the latter provide lower cost per byte, low leakage power and larger capacities than DRAM, while they can guarantee comparable access latency. Such kind of heterogeneous memory systems impose new challenges in terms of page placement and migration among the alternative technologies of the heterogeneous memory system. In this paper, we present a novel approach for efficient page placement on heterogeneous DRAM/NVM systems. We design an adjacent LSTM-based approach for page placement, which strongly relies on page accesses prediction, while sharing knowledge among pages with behavioral similarity. The proposed approach leads up to 65.5% optimized performance compared to existing approaches, while achieving near-optimal results and saving 20.2% energy consumption on average. Moreover, we propose a new page replacement policy, namely clustered-LRU, achieving up to 8.1% optimized performance, compared to the default Least Recently Used (LRU) policy.
BibTeX - Entry
@InProceedings{katsaragakis_et_al:OASIcs.PARMA-DITAM.2023.7,
author = {Katsaragakis, Manolis and Stavrakakis, Konstantinos and Masouros, Dimosthenis and Papadopoulos, Lazaros and Soudris, Dimitrios},
title = {{Adjacent LSTM-Based Page Scheduling for Hybrid DRAM/NVM Memory Systems}},
booktitle = {14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023)},
pages = {7:1--7:12},
series = {Open Access Series in Informatics (OASIcs)},
ISBN = {978-3-95977-269-3},
ISSN = {2190-6807},
year = {2023},
volume = {107},
editor = {Bispo, Jo\~{a}o and Charles, Henri-Pierre and Cherubin, Stefano and Massari, Giuseppe},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/opus/volltexte/2023/17727},
URN = {urn:nbn:de:0030-drops-177278},
doi = {10.4230/OASIcs.PARMA-DITAM.2023.7},
annote = {Keywords: Page Placement, Long Short-Term Memory, LSTM, Prediction, NVM, DRAM}
}
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Keywords: |
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Page Placement, Long Short-Term Memory, LSTM, Prediction, NVM, DRAM |
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Collection: |
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14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023) |
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Issue Date: |
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2023 |
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Date of publication: |
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13.03.2023 |
