License: Creative Commons Attribution 4.0 International license (CC BY 4.0)
When quoting this document, please refer to the following
DOI: 10.4230/DagSemProc.08351.6
URN: urn:nbn:de:0030-drops-20152
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2009/2015/
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Drechsler, Rolf ; Eggersglüß, Stephan ; Fey, Görschwin ; Tille, Daniel

SAT-based Automatic Test Pattern Generation

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08351.DrechslerRolf.Paper.2015.pdf (0.08 MB)

Abstract

Due to the rapidly growing size of integrated circuits, there is a need for new algorithms for Automatic Test Pattern Generation (ATPG). While classical algorithms reach their limit, there have been recent advances in algorithms to solve Boolean Satisfiability (SAT). Because Boolean SAT solvers are working on Conjunctive Normal Forms (CNF), the problem has to be transformed. During transformation, relevant information about the problem might get lost and therefore is not available in the solving process.

In the following we briefly motivate the problem and provide the latest developments in the field. The technique was implemented and experimental results are presented. The approach was combined with the ATPG framework of NXP Semiconductors. Significant improvements in overall performance and
robustness are demonstrated.

BibTeX - Entry

@InProceedings{drechsler_et_al:DagSemProc.08351.6,
  author =	{Drechsler, Rolf and Eggersgl\"{u}{\ss}, Stephan and Fey, G\"{o}rschwin and Tille, Daniel},
  title =	{{SAT-based Automatic Test Pattern Generation}},
  booktitle =	{Evolutionary Test Generation},
  pages =	{1--2},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2009},
  volume =	{8351},
  editor =	{Holger Schlingloff and Tanja E. J. Vos and Joachim Wegener},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/opus/volltexte/2009/2015},
  URN =		{urn:nbn:de:0030-drops-20152},
  doi =		{10.4230/DagSemProc.08351.6},
  annote =	{Keywords: Circuit, ATPG, SAT, Boolean Satisfiability}
}

Keywords: Circuit, ATPG, SAT, Boolean Satisfiability
Collection: 08351 - Evolutionary Test Generation
Issue Date: 2009
Date of publication: 25.05.2009

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