License: Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported license (CC BY-NC-ND 3.0)
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DOI: 10.4230/OASIcs.WCET.2009.2287
URN: urn:nbn:de:0030-drops-22875
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2009/2287/
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Eles, Petru

Predictable Implementation of Real-Time Applications on Multiprocessor Systems on Chip

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Eles.2287.pdf (0.4 MB)

Abstract

Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restrictive and particular contexts. One important aspect that makes the analysis difficult is the estimation of the system's communication behavior. The traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers as result of cache misses. As opposed to the analysis performed for a single processor system, where the cache miss penalty is constant, in a multiprocessor system each cache miss has a variable penalty, depending on the bus contention. This affects the tasks' WCET which, however, is needed in order to perform system scheduling. At the same time, the WCET depends on the system schedule due to the bus interference. In this context, we present an approach to worst-case execution time analysis and system scheduling for real-time applications implemented on multiprocessor SoC architectures. We will also address the bus scheduling policy and its optimization, which are of huge importance for the performance of such predictable multiprocessor applications.

BibTeX - Entry

@InProceedings{eles:OASIcs:2009:2287,
  author =	{Petru Eles},
  title =	{{Predictable Implementation of Real-Time Applications on Multiprocessor Systems on Chip}},
  booktitle =	{9th International Workshop on Worst-Case Execution Time Analysis (WCET'09) },
  pages =	{1--1},
  series =	{OpenAccess Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-14-9},
  ISSN =	{2190-6807},
  year =	{2009},
  volume =	{10},
  editor =	{Niklas Holsti},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2009/2287},
  URN =		{urn:nbn:de:0030-drops-22875},
  doi =		{10.4230/OASIcs.WCET.2009.2287},
  note =	{also published in print by Austrian Computer Society (OCG) with ISBN 978-3-85403-252-6},
  annote =	{Keywords: WCET analysis, multiprocessor, SoC, system scheduling}
}

Keywords: WCET analysis, multiprocessor, SoC, system scheduling
Collection: 9th International Workshop on Worst-Case Execution Time Analysis (WCET'09)
Issue Date: 2009
Date of publication: 26.11.2009

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