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When quoting this document, please refer to the following
DOI: 10.4230/OASIcs.MEMICS.2010.93
URN: urn:nbn:de:0030-drops-30608
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2011/3060/
Prikryl, Zdenek ;
Kroustek, Jakub ;
Hruska, Tomas ;
Kolar, Dusan
Fast Translated Simulation of ASIPs
Abstract
Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type translated simulation is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.
BibTeX - Entry
@InProceedings{prikryl_et_al:OASIcs:2011:3060,
author = {Zdenek Prikryl and Jakub Kroustek and Tomas Hruska and Dusan Kolar},
title = {{Fast Translated Simulation of ASIPs}},
booktitle = {Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers},
pages = {93--100},
series = {OpenAccess Series in Informatics (OASIcs)},
ISBN = {978-3-939897-22-4},
ISSN = {2190-6807},
year = {2011},
volume = {16},
editor = {Ludek Matyska and Michal Kozubek and Tom{\'a}{\v{s}} Vojnar and Pavel Zemc{\'i}k and David Antos},
publisher = {Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
address = {Dagstuhl, Germany},
URL = {http://drops.dagstuhl.de/opus/volltexte/2011/3060},
URN = {urn:nbn:de:0030-drops-30608},
doi = {10.4230/OASIcs.MEMICS.2010.93},
annote = {Keywords: Hardware/sofware co-design, simulation, architecture description languages, application-specific instruction set processors}
}
Keywords: |
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Hardware/sofware co-design, simulation, architecture description languages, application-specific instruction set processors |
Collection: |
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Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers |
Issue Date: |
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2011 |
Date of publication: |
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11.03.2011 |