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When quoting this document, please refer to the following
DOI: 10.4230/LIPIcs.MFCS.2016.45
URN: urn:nbn:de:0030-drops-64588
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2016/6458/
Golovnev, Alexander ;
Kulikov, Alexander S. ;
Smal, Alexander V. ;
Tamaki, Suguru
Circuit Size Lower Bounds and #SAT Upper Bounds Through a General Framework
Abstract
Most of the known lower bounds for binary Boolean circuits with unrestricted depth are proved by the gate elimination method. The most efficient known algorithms for the #SAT problem on binary Boolean circuits use similar case analyses to the ones in gate elimination. Chen and Kabanets recently showed that the known case analyses can also be used to prove average case circuit lower bounds, that is, lower bounds on the size of approximations of an explicit function.
In this paper, we provide a general framework for proving worst/average case lower bounds for circuits and upper bounds for #SAT that is built on ideas of Chen and Kabanets. A proof in such a framework goes as follows. One starts by fixing three parameters: a class of circuits, a circuit complexity measure, and a set of allowed substitutions. The main ingredient of a proof goes as follows: by going through a number of cases, one shows that for any circuit from the given class, one can find an allowed substitution such that the given measure of the circuit reduces by a sufficient amount. This case analysis immediately implies an upper bound for #SAT. To~obtain worst/average case circuit complexity lower bounds one needs to present an explicit construction of a function that is a disperser/extractor for the class of sources defined by the set of substitutions under consideration.
We show that many known proofs (of circuit size lower bounds and upper bounds for #SAT) fall into this framework.
Using this framework, we prove the following new bounds: average case lower bounds of 3.24n and 2.59n for circuits over U_2 and B_2, respectively (though the lower bound for the basis B_2 is given for a quadratic disperser whose explicit construction is not currently known), and faster than 2^n #SAT-algorithms for circuits over U_2 and B_2 of size at most 3.24n and 2.99n, respectively. Here by B_2 we mean the set of all bivariate Boolean functions, and by U_2 the set of all bivariate Boolean functions except for parity and its complement.
BibTeX - Entry
@InProceedings{golovnev_et_al:LIPIcs:2016:6458,
author = {Alexander Golovnev and Alexander S. Kulikov and Alexander V. Smal and Suguru Tamaki},
title = {{Circuit Size Lower Bounds and #SAT Upper Bounds Through a General Framework}},
booktitle = {41st International Symposium on Mathematical Foundations of Computer Science (MFCS 2016)},
pages = {45:1--45:16},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-016-3},
ISSN = {1868-8969},
year = {2016},
volume = {58},
editor = {Piotr Faliszewski and Anca Muscholl and Rolf Niedermeier},
publisher = {Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
address = {Dagstuhl, Germany},
URL = {http://drops.dagstuhl.de/opus/volltexte/2016/6458},
URN = {urn:nbn:de:0030-drops-64588},
doi = {10.4230/LIPIcs.MFCS.2016.45},
annote = {Keywords: circuit complexity, lower bounds, exponential time algorithms, satisfiability}
}
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Keywords: |
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circuit complexity, lower bounds, exponential time algorithms, satisfiability |
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Collection: |
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41st International Symposium on Mathematical Foundations of Computer Science (MFCS 2016) |
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Issue Date: |
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2016 |
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Date of publication: |
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19.08.2016 |
