License: Creative Commons Attribution 3.0 Unported license (CC BY 3.0)
When quoting this document, please refer to the following
DOI: 10.4230/LIPIcs.CSL.2017.19
URN: urn:nbn:de:0030-drops-76742
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2017/7674/
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Chen, Yijia ; Flum, Jörg ; Huang, Xuangui

Slicewise Definability in First-Order Logic with Bounded Quantifier Rank

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LIPIcs-CSL-2017-19.pdf (0.6 MB)


Abstract

For every natural number q let FO_q denote the class of sentences of
first-order logic FO of quantifier rank at most q. If a graph property can be defined in FO_q, then it can be decided in time O(n^q). Thus, minimizing q has favorable algorithmic consequences. Many graph properties amount to the existence of a certain set of vertices of size k. Usually this can only be expressed by a sentence of quantifier rank at least k. We use the color coding method to demonstrate that some (hyper)graph problems can be defined in FO_q where q is independent of k. This property of a graph problem is equivalent to the question of whether the corresponding parameterized problem is in the class para-AC^0.

It is crucial for our results that the FO-sentences have access to built-in addition and multiplication (and constants for an initial segment of natural numbers whose length depends only on k). It is known that then FO corresponds to the circuit complexity class uniform AC^0. We explore the connection between the quantifier rank of FO-sentences and the depth of AC^0-circuits, and prove that FO_q is strictly contained in FO_{q+1} for structures with built-in addition and multiplication.

BibTeX - Entry

@InProceedings{chen_et_al:LIPIcs:2017:7674,
  author =	{Yijia Chen and J{\"o}rg Flum and Xuangui Huang},
  title =	{{Slicewise Definability in First-Order Logic with Bounded Quantifier Rank}},
  booktitle =	{26th EACSL Annual Conference on Computer Science Logic (CSL 2017)},
  pages =	{19:1--19:16},
  series =	{Leibniz International Proceedings in Informatics (LIPIcs)},
  ISBN =	{978-3-95977-045-3},
  ISSN =	{1868-8969},
  year =	{2017},
  volume =	{82},
  editor =	{Valentin Goranko and Mads Dam},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2017/7674},
  URN =		{urn:nbn:de:0030-drops-76742},
  doi =		{10.4230/LIPIcs.CSL.2017.19},
  annote =	{Keywords: first-order logic, quantifier rank, parameterized AC^0, circuit depth}
}

Keywords: first-order logic, quantifier rank, parameterized AC^0, circuit depth
Collection: 26th EACSL Annual Conference on Computer Science Logic (CSL 2017)
Issue Date: 2017
Date of publication: 16.08.2017


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