License: Creative Commons Attribution 3.0 Unported license (CC BY 3.0)
When quoting this document, please refer to the following
DOI: 10.4230/DagRep.7.11.1
URN: urn:nbn:de:0030-drops-86681
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Bieniusa, Annette ; Boehm, Hans-J. ; Herlihy, Maurice ; Petrank, Erez
Weitere Beteiligte (Hrsg. etc.): Annette Bieniusa and Hans-J. Boehm and Maurice Herlihy and Erez Petrank

New Challenges in Parallelism (Dagstuhl Seminar 17451)

dagrep_v007_i011_p001_17451.pdf (3 MB)


A continuing goal of current multiprocessor software design is to improve the performance and reliability of parallel algorithms. Parallel programming has traditionally been attacked from widely different angles by different groups of people: Hardware designers designing instruction sets, programming language designers designing languages and library interfaces, and theoreticians developing models of parallel computation. Unsurprisingly, this has not always led to consistent results. Newly developing areas show every sign of leading to similar divergence. This Dagstuhl Seminar will bring together researchers and practitioners from all three areas to discuss and reconcile thoughts on these challenges.

BibTeX - Entry

  author =	{Annette Bieniusa and Hans-J. Boehm and Maurice Herlihy and Erez Petrank},
  title =	{{New Challenges in Parallelism (Dagstuhl Seminar 17451)}},
  pages =	{1--27},
  journal =	{Dagstuhl Reports},
  ISSN =	{2192-5283},
  year =	{2018},
  volume =	{7},
  number =	{11},
  editor =	{Annette Bieniusa and Hans-J. Boehm and Maurice Herlihy and Erez Petrank},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{},
  URN =		{urn:nbn:de:0030-drops-86681},
  doi =		{10.4230/DagRep.7.11.1},
  annote =	{Keywords: concurrency, memory models, non-volatile memory}

Keywords: concurrency, memory models, non-volatile memory
Collection: Dagstuhl Reports, Volume 7, Issue 11
Issue Date: 2018
Date of publication: 28.03.2018

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