License: Creative Commons Attribution 4.0 International license (CC BY 4.0)
When quoting this document, please refer to the following
DOI: 10.4230/OASIcs.PARMA-DITAM.2022.1
URN: urn:nbn:de:0030-drops-161175
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2022/16117/
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Tumeo, Antonino ; Agostini, Nicolas Bohm ; Curzel, Serena ; Limaye, Ankur ; Tan, Cheng ; Amatya, Vinay ; Minutoli, Marco ; Castellana, Vito Giovanni ; Li, Ang ; Manzano, Joseph

SO(DA)^2: End-to-end Generation of Specialized Reconfigurable Architectures (Invited Talk)

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OASIcs-PARMA-DITAM-2022-1.pdf (2 MB)

Abstract

Modern data analysis applications are complex workflows composed of algorithms with diverse behaviors. They may include digital signal processing, data filtering, reduction, compression, graph algorithms, and machine learning. Their performance is highly dependent on the volume, the velocity, and the structure of the data. They are used in many different domains (from small, embedded devices, to large-scale, high-performance computing systems) but in all cases they need to provide answers with very low latency to enable real-time decision making and autonomy. Coarse-grained reconfigurable arrays (CGRAs), i.e., architectures composed of functional units able to perform complex operations interconnected through a network-on-chip and configure the datapath to map complex kernels, are a promising platform to accelerate these applications thanks to their adaptability. They provide higher flexibility than application-specific integrated circuits (ASICs) while offering increased energy efficiency and faster reconfiguration speed with respect to field-programmable gate arrays (FPGAs). However, designing and specializing CGRAs requires significant efforts. The inherent flexibility of these devices makes the application mapping process equally important to the hardware design generation. To obtain efficient systems, approaches that simultaneously considers software and hardware optimizations are necessary. In this paper, we discuss the Software Defined Architectures for Data Analytics (SO(DA)²) toolchain, an end-to-end hardware/software codesign framework to generate custom reconfigurable architectures for data analytics applications. (SO(DA)²) is composed of a high-level compiler (SODA-OPT) and a hardware generator (OpenCGRA) and can automatically explore and generate optimal CGRA designs starting from high-level programming frameworks. SO(DA)² considers partial dynamic reconfiguration as key element of the system design. We discuss the various elements of the framework and demonstrate the flow on the case study of a partial dynamic reconfigurable CGRA design for data streaming applications.

BibTeX - Entry

@InProceedings{tumeo_et_al:OASIcs.PARMA-DITAM.2022.1,
  author =	{Tumeo, Antonino and Agostini, Nicolas Bohm and Curzel, Serena and Limaye, Ankur and Tan, Cheng and Amatya, Vinay and Minutoli, Marco and Castellana, Vito Giovanni and Li, Ang and Manzano, Joseph},
  title =	{{SO(DA)^2: End-to-end Generation of Specialized Reconfigurable Architectures}},
  booktitle =	{13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2022)},
  pages =	{1:1--1:15},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-231-0},
  ISSN =	{2190-6807},
  year =	{2022},
  volume =	{100},
  editor =	{Palumbo, Francesca and Bispo, Jo\~{a}o and Cherubin, Stefano},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/opus/volltexte/2022/16117},
  URN =		{urn:nbn:de:0030-drops-161175},
  doi =		{10.4230/OASIcs.PARMA-DITAM.2022.1},
  annote =	{Keywords: Reconfigurable architectures, data analytics}
}

Keywords: Reconfigurable architectures, data analytics
Collection: 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2022)
Issue Date: 2022
Date of publication: 08.06.2022
Supplementary Material: Software (Source Code): https://gitlab.pnnl.gov/sodalite/soda-opt
Software (Source Code): https://github.com/pnnl/OpenCGRA

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