License: Creative Commons Attribution 4.0 International license (CC BY 4.0)
When quoting this document, please refer to the following
DOI: 10.4230/DagSemProc.10281.2
URN: urn:nbn:de:0030-drops-28926
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2010/2892/
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Athanas, Peter M. ; Becker, Jürgen ; Teich, Jürgen ; Verbauwhede, Ingrid

10281 Summary -- Dynamically Reconfigurable Architectures

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10281.SWM.ExtAbstract.2892.pdf (0.03 MB)

Abstract

Dynamic and partial reconfiguration of hardware architectures such as FPGAs and coarse grain processing arrays bring an additional level of flexibility in the design of electronic systems by exploiting the possibility of configuring functions on-demand during run-time. When compared to emerging software-programmable Multi-Processor System-on-a-Chip (MPSoC) solutions, they benefit a lot from lower cost, more dedication and fit to a certain problem class as well as power and area efficiency. This has led to many new ways of approaching existing research topics in the area of hardware design and optimization techniques. For example, the possibility of performing adaptation during run-time raises questions in the areas of dynamic control, real-time response, on-line power management and design complexity, since the reconfigurability increases the design space towards infinity.

BibTeX - Entry

@InProceedings{athanas_et_al:DagSemProc.10281.2,
  author =	{Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid},
  title =	{{10281 Summary – Dynamically Reconfigurable Architectures}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2010},
  volume =	{10281},
  editor =	{Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/opus/volltexte/2010/2892},
  URN =		{urn:nbn:de:0030-drops-28926},
  doi =		{10.4230/DagSemProc.10281.2},
  annote =	{Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, CAD Tool Support, Reconfigurable/Adaptive Computing based on Nanotechnologies}
}

Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture,
Freie Schlagwörter (englisch): CAD Tool Support, Reconfigurable/Adaptive Computing based on Nanotechnologies
Collection: 10281 - Dynamically Reconfigurable Architectures
Issue Date: 2010
Date of publication: 14.12.2010

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