License: Creative Commons Attribution-NoDerivs 3.0 Unported license (CC BY-ND 3.0)
When quoting this document, please refer to the following
DOI: 10.4230/OASIcs.PPES.2011.11
URN: urn:nbn:de:0030-drops-30774
URL: http://dagstuhl.sunsite.rwth-aachen.de/volltexte/2011/3077/
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Schoeberl, Martin ; Schleuniger, Pascal ; Puffitsch, Wolfgang ; Brandner, Florian ; Probst, Christian W.

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

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Abstract

Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case performance are hard to be modeled for the WCET analysis. In this paper we present Patmos, a processor optimized for low WCET bounds rather than high average case performance. Patmos is a dual-issue, statically scheduled RISC processor. The instruction cache is organized as a method cache and the data cache is organized as a split cache in order to simplify the cache WCET analysis. To fill the dual-issue pipeline with enough useful instructions, Patmos relies on a customized compiler. The compiler also plays a central role in optimizing the application for the WCET instead of average case performance.

BibTeX - Entry

@InProceedings{schoeberl_et_al:OASIcs:2011:3077,
  author =	{Martin Schoeberl and Pascal Schleuniger and Wolfgang Puffitsch and Florian Brandner and Christian W. Probst},
  title =	{{Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach}},
  booktitle =	{Bringing Theory to Practice: Predictability and Performance in Embedded Systems},
  pages =	{11--21},
  series =	{OpenAccess Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-28-6},
  ISSN =	{2190-6807},
  year =	{2011},
  volume =	{18},
  editor =	{Philipp Lucas and Lothar Thiele and Benoit Triquet and Theo Ungerer and Reinhard Wilhelm},
  publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2011/3077},
  URN =		{urn:nbn:de:0030-drops-30774},
  doi =		{10.4230/OASIcs.PPES.2011.11},
  annote =	{Keywords: Time-predictable architecture, WCET analysis, WCET-aware compilation}
}

Keywords: Time-predictable architecture, WCET analysis, WCET-aware compilation
Collection: Bringing Theory to Practice: Predictability and Performance in Embedded Systems
Issue Date: 2011
Date of publication: 21.03.2011

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